Cherenkov readout

From solidwiki
Jump to: navigation, search

test

meeting https://hallaweb.jlab.org/wiki/index.php/Meeting_solid_preRD_cher

data location /work/halla/solid/cc_pro

info and plot location https://solid.jlab.org/files/cc_pro (/group/solid/www/solid/html/files/cc_pro/)

pmt

H12700 general specs https://www.hamamatsu.com/resources/pdf/etd/H12700_H14220_TPMH1379E.pdf

PMT used in test https://solid.jlab.org/files/cc_pro/pmt/

pixel_id and maroc_id are shown at https://clasweb.jlab.org/wiki/images/4/46/Maroc_ch.pdf

lasertest

MAPMT test with laser, maroc pixel by PC and sum by fadc, at CLAS12 laser test stand

note,log,script https://github.com/JeffersonLab/solid_cc_readout/tree/main/lasertest

plot and others https://solid.jlab.org/files/cc_pro/lasertest/

refer to clas12 RICH info https://userweb.jlab.org/~kenjo/RICH/

refer to clas12 RICH info https://www.jlab.org/accel/RadCon/opsgraphs/rich/wwwf/archive/?C=M;O=D

refer to clas12 RICH info https://www.jlab.org/accel/RadCon/opsgraphs/rich/wwwf/

benchtest

note in general

raw fadc data during beamtest using large simple sum board https://logbooks.jlab.org/files/2020/09/3853122/mapmt_sums_event_78237.png

MAPMT readout assembly https://solid.jlab.org/files/cc_pro/mapmt_readout_assembly.pdf

photo of maroc sum https://solid.jlab.org/files/cc_pro/benchtest/photo_mapmt_maroc_sum/

photo of simple sum https://solid.jlab.org/files/cc_pro/benchtest/photo_mapmt_simple_sum/

decoder and analysis code https://eicweb.phy.anl.gov/cherenkov/fadc_decoder/-/tree/revamp

keep FPGA boards cool <70C whenever its LV is on !!! the small fan needs to be on at all time and it can keep FPGA board below 50C 


monitor temperature in unit C when last ssp scaler run happened by
ll /home/clasrun/rich/suite1.0/data/temperature/ssprich_Temperatures.txt
tail -n138 /home/clasrun/rich/suite1.0/data/temperature/ssprich_Temperatures.txt

If it's outdated and you want to check current temperature, take a scaler run as follows
> ssh root@sbsvme22
> source /usr/clas12/release/1.4.0/setup
> setenv RICH_SUITE /home/clasrun/rich/suite1.0
> cd $RICH_SUITE/sw/daq
> ssptest_ConfigureAll 230 64 0
> ./thr_scan.sh 170 175 0 
> (You have to reset coda after any scaler operation so coda can initialize ssp correctly!)
refer to details below


desktop tunl11, user solid and root
crate sbsvme22, user daq and root
ask password from Zhiwen or Alex

to start x11vnc at tunl11 localhost:0, run ~/myvnc_0 as root

LED275W anode should connect to coaxil cable core, cathod should connect to coaxil cable skin
This way it can driven by a postive charge

function generator controllering LED is set with 1kHz 5ns width positive pulse at output1
If the light at output1 is off, turn it on by press "shift",then "utput1"

OM4 optical 4-to-1 cables from fibercablesdirect.com has 12 fiber heads to FPGA board and 1 fiber tail to ssp card
The pairing are L-R or Yellow-White: 1-12,2-11,3-10,4-9, while 4 others are unused.
Other company may do it differently

15 pmts on 5 FPGA boards and each board is connected to one fiber head
ssp card has 8 holes from 1 to 8, each hole can take 1 4-to-1 fiber tail, so each ssp card can have 32 fiber head for 32 FPGA boards
ssp fiber number will show in DAQ as follows (it's not related to fiber tail, but to ssp hole and fiber head only!)
ssp fiber 0: ssp hole 1, fiber head 1-12
ssp fiber 1: ssp hole 1, fiber head 2-11
ssp fiber 2: ssp hole 1, fiber head 3-10
ssp fiber 3: ssp hole 1, fiber head 4-9
ssp fiber 4: ssp hole 2, fiber head 1-12

crate 1 has fadc in slot 3 and ssp in slot 15

To control the Lecroy HV power supply
switch its power on at back of crate, turn the turn key at front of crate to position "remote" and 
wait for display "remote" stable
connect it to USB port at the back of tunl11 using the blue network to USB converter
check if /dev/ttyUSB0 exist
run "minicom" as root, then type return, type 1450, type vt100
see help manual on right side, set target V and enable channel by "[", power on by "{" or or use "h" for help and "q" to quit help
Only one "minicom" can be alive, to run another in other terminal, kill existing one first
	
keysight E336313A LV power supply
4.5-5.5V and 0.9A need for each board
840mA is typically once they fully boot and run, but you definitely want a bit of margin otherwise it can trip during startup and be in an endless startup oscillation

ssp runs with 125Mhz clock at right side of vxs crate, fadc run at 250Mhz at left side of crate

To check ticard, run "tiint" at sbsvme22

in vxs crate, 
Tigger supervisor (TS) module has to be at very right slot 21
discriminator (DS) module use twisted wire to connect to TS#1 at TS module and wire polarity are same

Open DiagGui
From sbsvme22: cd /home/daq/diaggui_server
>> $ nohup ./DiagGuiServer &
From solid@tunl11: cd fe_diaggui/
Install root as: source /apps/root/5.34.36/setroot_CUE.csh
Then $./DiagGUI ROC_sbsvme22.txt

lucite refraction index
https://hypertextbook.com/facts/2005/EmreErdal.shtml

coda data taking

To enable particular pixels of the PMTs read this document https://solid.jlab.org/files/cc_pro/benchtest/TestPlot_Laser_LED_Benchtest/pixel_enabling.pdf

both solid@tunl11 and daq@sbsvme22 use tunl11:/home/solid/.tcshrc for coda env setup, don't change it

As solid@tunl11, you can login daq@sbsvme22 without password

coda evio output location tunl11:/home/solid/data

evio backup by "scp * karki@ifarm:/cache/halla/solid/subsystem/hgc/2020benchtest/coda/", then "chown karki.12gev_solid /cache/halla/solid/subsystem/hgc/2020benchtest/coda/*" (use scp instead of cp to have correct owner, use chown to have correct group)


start coda 

as solid@tunl11
> vncserver (start vnc)
> vncviewer localhost :1 &  (login with same password of user solid)
inside vnc
> kcoda
> startCoda

config coda 

coda config is at daq@sbsvme22:git/rol
>> Changing the FADC configuration file 
*Login to daq@sbsvme22
* Go to directory git/rol/config
* Edit "fadc250.cnf" file 
* Once edited, compile from it from directory : git/rol by command (make -B)
* To see the change in CODA, reset the coda (NOT JUST THE PRESTART)
>> List file is at :git/rol/solidhgc_list.c
* To have the prescaled enabled tiSetInputPrescale(input, prescale), where input=1 (TS#1) 
* prescale value = 2^(ps -1) +1 , where ps is prescale setting
>> Once the file is changed, compile it (make -B) and prestart the coda

debug code 

If the crate is down,the xterms should have remained up while the crates were down
If they are closed, just start them up again.
If you think the ROCs need restarted: "restartStuff"  as solid@tunl11
The xterms for the ROCS and PEB should remain up until you kcoda. refer to https://github.com/JeffersonLab/coda_scripts

when coda running, the processes below are present 

[daq@sbsvme22 ~]$ ps -ef | grep coda
daq       5911  5893  0 12:40 pts/0    00:00:00 /bin/bash /home/daq/coda_scripts/startROC.sh ROC1
daq       5913  5911 99 12:40 pts/0    01:13:25 coda_roc -i -v -name ROC1 -session solidhgc
[solid@tunl11 ~]$ ps -ef | grep coda
solid     8423  8390  0 12:45 pts/17   00:00:00 /bin/bash /home/solid/coda_scripts/startPEB.sh
solid     8428  8423  0 12:45 pts/17   00:00:00 /bin/csh -f /home/solid/coda3/3.10/Linux-x86_64/bin/coda_emu_peb PEB1
solid     8430  8428  1 12:45 pts/17   00:00:44 /home/solid/jdk1.8.0_152/bin/java -cp /home/solid/coda3/3.10/common/jar/* -XX:+PerfDisableSharedMem -XX:+UseG1GC -Djava.net.preferIPv4Stack=true -Djava.library.path=/home/solid/coda3/3.10/Linux-x86_64/lib -DcmsgUDL=rc://multicast/solidhgc -Dname=PEB1 -Dtype=PEB org.jlab.coda.emu.EmuFactory
solid    19258  3339  0 13:51 pts/2    00:00:00 grep --color=auto coda
solid    31228 31221  0 12:06 pts/14   00:00:00 /bin/csh -f /home/solid/coda3/3.10/Linux-x86_64/bin/platform
solid    31231 31228  2 12:06 pts/14   00:02:50 /home/solid/jdk1.8.0_152/bin/java -Xms200m -Xmx2048m -XX:-UseConcMarkSweepGC -Djava.net.preferIPv4Stack=true org.jlab.coda.afecs.platform.APlatform
solid    31291     1  0 12:06 pts/15   00:00:00 /bin/csh -f /home/solid/coda3/3.10/Linux-x86_64/bin/rcgui
solid    31296 31291 44 12:06 pts/15   00:47:26 /home/solid/jdk1.8.0_152/bin/java -Xms200m -Xmx500m -Dprism.order=sw -Dsun.java2d.pmoffscreen=false -Djava.net.preferIPv4Stack=true org.jlab.coda.afecs.ui.rcgui.RcGuiApplication
solid    31315 31297  0 12:06 pts/12   00:00:00 /bin/bash /home/solid/coda_scripts/remote_vme tunl11 nobody startPEB.sh
solid    31328 31310  0 12:06 pts/16   00:00:00 /bin/bash /home/solid/coda_scripts/remote_vme sbsvme22 nobody startROC.sh ROC1

DATA STORED evio file: run number less than 1000 (0-999) are at /cache/halla/solid/subsystem/hgc/2020benchtest/coda/ 
run numbers greater than 1000 are at /w/halla-scifs17exp/solid/cc_pro/benchtest/coda/data
DECODED RUNS (Both TDC and FADC DECODED) are at /w/halla-scifs17exp/solid/cc_pro/benchtest/coda/root

coda data analysis

cc readout benchtest coda runlog

info 

in evio, fadc tag=3, ssp tag=18
maroc sum has sum signal of fadc value as it is, but quad fadc signal needs 4095-fadc, this is like MAPMT simple sum readout

root on ifarm /work/halla/solid/cc_pro/benchtest/coda/root

plot on web https://solid.jlab.org/files/cc_pro/benchtest/coda

how to use decoder and do fadc analysis 

latest
cd /work/halla/solid/cc_pro/fadc_decoder-revamp_latest
source /work/hallb/prad/apps/set_env_CUE_modern.csh
source env/setup_env.csh
build/src/analyze -m database/modules/mapmt_maroc_bench_20200903.json ../benchtest/coda/data/solidhgc_73.evio.0 ../benchtest/coda/root/solidhgc_73.root

old
cd /work/halla/solid/cc_pro/fadc_decoder-revamp
source /work/hallb/prad/apps/set_env_CUE_modern.csh
source env/setup_env.csh
build/src/analyze --config-module="config/mapmt_maroc_bench_20200903.conf" -c 1 ../benchtest/coda/data/solidhgc_73.evio.0 ../benchtest/coda/root/solidhgc_73.root

make raw fadc plot
python scripts/draw_events.py ../benchtest/root/solidhgc_73.root MAPMT_SUMS -o plots/run73 -e 100,200
python scripts/draw_events.py ../benchtest/root/solidhgc_73.root MAPMT_QUADS -o plots/run73 -e 100,200

compile
cd /work/halla/solid/cc_pro/
git clone https://eicweb.phy.anl.gov/cherenkov/fadc_decoder.git fadc_decoder-revamp_latest
cd fadc_decoder-revamp_latest
git checkout revamp
source /work/hallb/prad/apps/set_env_CUE_modern.csh
source env/setup_env.csh
mkdir build && cd build
cmake ..
make -j8

Oldold 

cp -rpv /w/hallb-scifs17exp/general/prad/jz/hgc/decoder/fadc_decoder /work/halla/solid/cc_pro
cd fadc_decoder 
source /work/hallb/prad/apps/set_env_CUE_modern.csh
source env/setup_env.csh
rm -rf build
mkdir build && cd build
cmake ..
make -j4
build/src/analyze ../test_esb/data/solidhgc_67.evio.0 ../test_esb/root/solidhgc_67.root


source /work/hallb/prad/apps/set_env_CUE_modern.csh
git clone https://eicweb.phy.anl.gov/cherenkov/fadc_decoder.git
cd fadc_decoder/
git checkout revamp
mkdir build && cd build
cmake ..
make
cd ..
./build/ssp/ssp_analyze /w/hallb-scifs17exp/general/prad/jz/fadc_decoder-master/solidhgc_50.evio.0 solidhgc_50.root

maroc analysis

root -b -q 'mRICH_reco.C("/w/halla-scifs17exp/solid/cc_pro/fadc_decoder/solidhgc_67.root" )'

maroc scaler data taking and analysis

cc readout benchtest scaler rate scan runlog another

cc readout benchtest scaler rate scan runlog

cc readout benchtest scaler runlog

scaler text output location tunl11:/home/clasrun/rich/suite1.0/data/ped

tar those small files into a large files and then backup by "scp * karki@ifarm:/cache/halla/solid/subsystem/hgc/2020benchtest/scaler/", then "chown karki.12gev_solid /cache/halla/solid/subsystem/hgc/2020benchtest/scaler/*" (use scp instead of cp to have correct owner, use chown to have correct group) 


refer to
https://clasweb.jlab.org/wiki/images/7/7a/Instructions_Pedestal-Dark.txt
/usr/clas12/release/1.4.0/parms/ssp/rich4.cnf

** take scalar data at sbsvme22 ********************
ssh root@sbsvme22

#check if three dir is mounted from tunl11
ps -ef |grep sshfs
#mount them if needed, for example, after either sbsvme22 or tunl11 reboot
Type : /home/mysshfs
If previously system has been rebooted then you probably need to unmount the directories first
For this type: umount -l YOUR_MNT_DIR

#set env
source /usr/clas12/release/1.4.0/setup
setenv RICH_SUITE /home/clasrun/rich/suite1.0

cd $RICH_SUITE/sw/daq

#check connection, this will turn on green lights on ssp board for each connected fiber
ssptest_ConfigureAll 230 64 0  
(it will create setup.txt in its running dir)

#to check light leak, turn HV on at -1kV, then run
./check_lightleak.sh 300 64 | grep -A15 Counting
(the resulting rate per pixel should be 100-200Hz at used threshold 300 when there is no lightleak)

# scan with constant gain
ssptest_ConfigureAll 230 64 0
./thr_scan.sh 170 220 64  #ped scan
./thr_scan.sh 150 650 64  #dark scan

# scan with gain map at $RICH_SUITE/maps/gain.txt
ssptest_ConfigureAll 230 0 0
./thr_scan.sh 170 220 0  #ped scan
./thr_scan.sh 150 650 0  #dark scan

edit thr_scan.sh to change scan step size if needed

#change and compile code
cd /usr/clas12/release/1.4.0/coda/src/rol
edit /usr/clas12/release/1.4.0/coda/src/rol/main/ssptest_ConfigureAll.c
edit /usr/clas12/release/1.4.0/coda/src/rol/main/ssptest_ScalerAll.c
edit /usr/clas12/release/1.4.0/coda/src/rol/main/ssptest_ScalerAll_loop.c
(put all other source code in dir tmp, otherwise they will be recompiled also)
cd /usr/clas12/release/1.4.0/coda/src/rol
make -j4
make install

** analyze data at tunl11 ********************
source /apps/root/5.34.36/setroot_CUE.csh
setenv RICH_SUITE /home/clasrun/rich/suite1.0

The main code is at $RICH_SUITE/sw/ana/lib/rich.C  where NPMT and fiberMax need to match current hardware setting

and it depends on files below  which content should match current hardware setting
 #define FIBERMAP    "../map/fiber.map"      (this file control how plots are made and is better to match the current setting, other files are less important)
 Loading Pedestals from file ../../../maps/pedCHIP.txt
 Loading Thresholds from file ../../../maps/threshold.txt
 Loading Gains from file ../../../maps/gain.txt

cd $RICH_SUITE/sw/ana/ped
./recoPed.sh ../../../data/ped/rich_pedestal_20200814_140522.txt 0 #for ped run
./recoPed.sh ../../../data/ped/rich_pedestal_20200814_191511.txt 1 #for dark run

see results at $RICH_SUITE/results/scalers
and https://solid.jlab.org/files/cc_pro/benchtest/scalers/

clas12 rich result example
https://solid.jlab.org/files/cc_pro/benchtest/scalers/
/200730_063821

=== setup maroc scaler at desktop tunl11 and vxs crate sbsvme22==========================

make a copy of clas12 coda code at tunl11
then mount this copy from tunl11 onto sbsvme22 using sshfs, because sbsvme22 has very limit disk size

** at tunl11 as user solid **********

at clasrun@clondaq6
tar zcfv clas12_1.4.0_coda.tgz /usr/clas12/release/1.4.0/coda
tar zcfv clas12_1.4.0_clon.tgz /usr/clas12/release/1.4.0/clon
tar zcfv clas12_1.4.0_parms.tgz /usr/clas12/release/1.4.0/parms
scp to tunl11 and extract at /usr/clas12/release/1.4.0/

at clasrun@clondaq6
tar zcfv activemq.tgz /usr/local/activemq
scp to tunl11 and extract at /usr/local/activemq

at clasrun@clondaq6
tar zcfv gcc_8.3.0.tgz /apps/gcc/8.3.0
scp to tunl11 and extract at /home/clasrun/apps/gcc/8.3.0

at clasrun@clondaq6
scp /usr/clas12/release/1.4.0/.setup solid@tunl11:/usr/clas12/release/1.4.0/
cp .setup setup
edit "setup" to have new gcc and root location

at clasrun@rich4
tar zcfv rich_1.0.tgz --exclude='results/*' rich/suite1.0
scp to tunl11 and extract at /home/clasrun/rich/suite1.0

all tgz files are stored at tunl11:/home/clasrun/

(in hindsight, I can extract everything at /home/clasrun instead of /usr on tunl11 and just need to mount them correctly at sbsvme22)

** at sbsvme22 as user root  **************************

/home/mysshfs #mount file from tunl11 like the following
sshfs   solid@tunl11:/usr/clas12/release/1.4.0 /usr/clas12/release/1.4.0
sshfs   solid@tunl11:/usr/local/activemq /usr/local/activemq
sshfs   solid@tunl11:/home/clasrun /home/clasrun

To match latest activemq 3.9.5
donwload and install the following from https://yum.jasonlitka.com/EL5/i386/
apr-1.3.12-1.jason.1.i386.rpm  
apr-devel-1.3.12-1.jason.1.i386.rpm 
apr-util-1.3.12-1.jason.1.i386.rpm 

cd /usr/clas12/release/1.4.0/coda/src
edit /usr/clas12/release/1.4.0/coda/src/Makefile.include to use this gcc
   ifeq ("$(OSTYPE_PLATFORM)","Linux_i686")
    CC = /home/clasrun/apps/gcc/8.3.0/bin/gcc
    CXX = /home/clasrun/apps/gcc/8.3.0/bin/g++ 
     SHLD = $(CXX) -shared -g

FADC scaler data taking and analysis

>> The FADC config file is at daq@sbsvme22:/home/daq/git/rol/config/fadc250.cnf (make sure its for LED run not with scintillator)
>> To change the threshold of each channel you can change the variable "FADC250_ALLCH_TET"
>> Run coda in "FADCSSPscalers" config (just configure and download)
>> Type $"~/coda_scripts/StartScalerServer.sh" from daq@sbsvme22
>> Go to "solid@tunl11:/home/solid"
>> Type : $ getscalers sbsvme22 > file1.txt (its stores the scalers values in file1.txt)
>> Type : $ getscalers sbsvme22 > file2.txt (type this command after 10 sec, so that you can get scalers at other time)
>> Type: $ bash get_fadc_scaler_rate.sh file1.txt file2.txt (It displays the fadc scalers in Hz for sum and quad signal)
>> Note : Basically script "get_fadc_scaler_rate.sh" takes the difference of scaler count and time between two different scaler reading. Channel 141 is time (60 Hz clock). First 15 are channel currently use. Rest are the reading from tube, you can ignore for now.

Carl test

Carl test log

older test

other info

Feb 04-2021 simple sum board modified to reduced oscillation, boards 3, 4, 5, 6, and 7 are currently being used. Ben has board labelled "2". Before this modification of simple sum board "2" was being used but now its replaced by "3" (Ben has board "2") with same Maroc chip and FPGA as of "2" Maroc with board 7 did not show signal so currently its replaced (only Maroc chip) by spare one (with simple sum board "1")

CLAS12 RICH rate

2khz/pixel rate average in one PMT with beam, shown in Fig 29 of https://clasweb.jlab.org/12gev/nims/rich-nim.pdf

from Marco Mirazita 

studies as a function of the beam current have been done in the past, see for example this log entry: https://logbooks.jlab.org/entry/3520614
The scalers are linear up to 200 nA beam current, rates of the order of few kHz for normal PMTs. All these plots are done with average rates per MAPMT. We have few channels with dark noise at level of MHz, and still the scalers look linear. hot PMT 344 show max 16kHz at p345 of https://www.jlab.org/Hall-B/secure/clas12/RICH/mirazita/EngRunData/BeamCurrentScan/PlotBeamCurrentData.pdf

from Valery Kubarovsky 

https://logbooks.jlab.org/entry/3836244 We tested RICH per pixel rate upto 5 kHz, 320  kHz per PMT. It is still linear.


</pre> from Ben 

https://clasweb.jlab.org/wiki/images/7/76/JUNE2015_RICH_Review_FPGAboard.pdf page 9, RICH daq only goes to 50kHz trigger rate, it assumes 25k pixels in 1 crate with 1Gbps ethernet readout. So for you to get the livetime  you'll have to determine the occupancy curve. 300kHz pixel rate - let's say for fun you have a 200ns window (which is narrow, but probably reasonably possible), then you have an occupancy of 6% - the magenta curve  which doesn't look good as it approaches 100kHz! I'd have to rescale it for however many channels your system has.
1) The per channel rate limit with no readout per pixel is ~4MHz (thats a firmware limit - could be larger if needed, not saying anything about PMT  life, pile-up efficiency, etc) 
2) The next limit is basically triggered readout - the number of hits readout has to fit onto 1GbE readout per crate (8bytes per hit * event rate * occupancy * #ch < 125MB/s) - an it really needs some margin, assuming 100MB/s is more reasonable
3) I'm pretty sure we'll be using the VTP for readout by this time, that will allow getting close to 10GbE readout from each crate (using VXS lines instead of VME, so the backplane should give at least 200MB/s from each slot in parallel to each VTP)
4) 30ns is plausible for timing coincidence (~16ns needed just for MAROC shaping), then whatever the trigger sampling jitter, particle TOF skew, and readout channel skew need to be added

ssp decoding info

For the SoLID Cerenkov test in HallC, maroc electronics will be read out by ssp which can be recorded by coda into evio file

For GEM in HallA/C, it will be readout by ssp also

If we use analyzer to read evio, we would need to make it read ssp bank.

Then interpret its content of maroc or GEM separately.

general info

code

  • c++ example from Danning Di
    • code to read evio file for GEM detector
    • sample evio file

maroc tdc analysis from EIC mRICH test

  • /work/halla/solid/cc_pro/maroc_mirazita
Retrieved from "https://solid.jlab.org/wiki/index.php?title=Cherenkov_readout&oldid=2063"